Implementation on <i>FPGA</i> of Neuro-Genetic PID Controllers Auto-Tuning

The present paper studies the use of genetic algorithm to optimize tuning Proportional, Integral and Derivative (PID) controller. Two control criteria were considered, integral time multiplied by absolute error (ITAE), output (ITAY). variant plant tested is a first-order with delay. We aim at real implementation inside digital board, so, previous continuous approach was discretized tested; corresponding presented in this paper. algorithms PID controller are executed using soft processor NIOS II Field Programmable Gate Array (FPGA). computational results show robustness versatility technology.